// SN74HC595 8-Bit Shift Register Device Services
// Copyright (C)2020-2023, Philip Munts dba Munts Technologies.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// * Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
namespace IO.Devices.SN74HC595
{
///
/// Encapsulates a chain of one or more SN74HC595 8-bit shift registers.
///
public class Device
{
private readonly IO.Interfaces.SPI.Device spidev;
private byte[] statebuf;
///
/// SPI clock mode for the SNHC74HC595 shift register.
///
public const int SPI_Mode = 0;
///
/// SPI maximum clock frequency for the SNHC74HC595 shift register.
/// (Most pessimistic datasheet limit at 2V.)
///
public const int SPI_MaxFreq = 4000000;
///
/// Constructor for a chain of one or more SN74HC595 shift registers.
///
/// SPI device object.
/// Number of stages in the chain.
/// Initial shift register chain state.
public Device(IO.Interfaces.SPI.Device dev, int stages = 1, byte[] initialstate = null)
{
// Validate parameters
if (stages < 1)
throw new System.Exception("stages paramter is invalid");
if (initialstate != null)
if (initialstate.Length != stages)
throw new System.Exception("initialstate parameter length is invalid");
// Save the SPI device object
spidev = dev;
// Allocate shift register state buffer
statebuf = new byte[stages];
// Initialize shift register state buffer
if (initialstate == null)
{
for (int i = 0; i < state.Length; i++)
statebuf[i] = 0;
}
else
{
statebuf = initialstate;
}
// Shift out initial register state
spidev.Write(statebuf, statebuf.Length);
}
///
/// Read-only property returning the number of stages in the chain.
///
public int Length
{
get
{
return statebuf.Length;
}
}
///
/// Read/Write shift register chain state property.
///
public byte[] state
{
get
{
return statebuf;
}
set
{
if (value.Length != statebuf.Length)
throw new System.Exception("Shift register data length mismatch");
spidev.Write(value, value.Length);
statebuf = value;
}
}
///
/// Read a single bit in the shift register chain.
///
/// Shift register stage number. Zero indicates
/// the first register stage.
/// Shift register bit mask.
/// Boolean bit value.
public bool ReadBit(int index, byte mask)
{
return ((statebuf[index] & mask) != 0);
}
///
/// Set a single bit in the shift register chain.
///
/// Shift register stage number. Zero indicates
/// the first register stage.
/// Shift register bit mask.
public void SetBit(int index, byte mask)
{
statebuf[index] |= mask;
spidev.Write(statebuf, statebuf.Length);
}
///
/// Clear a single bit in the shift register chain.
///
/// Shift register stage number. Zero indicates
/// the first register stage.
/// Shift register bit mask.
public void ClrBit(int index, byte mask)
{
statebuf[index] &= (byte)~mask;
spidev.Write(statebuf, statebuf.Length);
}
}
}