Index of /arm-mcu/gcc/lpc17xx

      Name                    Last modified       Size  

[DIR] Parent Directory 15-Mar-2017 12:15 - [DIR] CMSIS/ 11-Jan-2018 10:20 - [   ] Makefile 11-Jan-2018 10:20 1k [TXT] README.txt 15-Mar-2017 12:15 2k [TXT] 06-Apr-2019 13:46 2k [TXT] cpu.c 11-Jan-2018 10:20 1k [TXT] cpu.h 11-Jan-2018 10:20 2k [TXT] gpio.c 11-Jan-2018 10:20 3k [TXT] gpio.h 11-Jan-2018 10:20 28k [   ] lpc17xx.S 11-Jan-2018 10:20 6k [   ] lpc17xx.debugjlink 11-Jan-2018 10:20 1k [   ] lpc17xx.flashocd 11-Jan-2018 10:20 2k [   ] lpc17xx.ld 11-Jan-2018 10:20 3k [TXT] 11-Jan-2018 10:20 2k [   ] lpc17xx.openocd 11-Jan-2018 10:20 1k [TXT] serial.c 26-Mar-2019 13:23 6k

NXP (nee Philips) LPC17xx ARM Cortex-M3 Microcontroller Framework


The C run time startup code lpc17xx.S and linker script lpc17xx.ld were written by myself based on various examples on the Internet and in The Definitive Guide to the ARM Cortex-M3.

The CMSIS library came from NXP, with some minor customization by myself.

Other files are original works by myself.

Memory Map (LPC1768)

Code Flash: 0x00000000 to 0x0007FFFF 512 KB
Data RAM: 0x10000000 to 0x10007FFF 32 KB

Other Devices

This framework may be used for other devices in the NXP LPC17xx family, provided the following files are modified:

lpc17xx.ld The RAM and ROM sizes must match the device.
lpc17xx.S The interrupt vector table must match the device.
lpc17xx.debugjlink The memory regions reported to GDB must match the device.

Test Platform

This framework is validated on the following LPC17xx development boards:

Tested on 10 June 2015 with gcc 4.9.2.

Questions or comments to Philip Munts

I am available for custom system development (hardware and software) of products using the LPC17xx or other microcontrollers.