| ../ | ||
| CMSIS/ | 512 | Jan 11 02:20:19 2018 |
| LPC1114FN28.S | 6512 | Jan 25 11:01:21 2021 |
| LPC1114FN28.debugjlink | 1498 | Jan 11 02:20:19 2018 |
| LPC1114FN28.ld | 3018 | Jan 11 02:20:19 2018 |
| Makefile | 1422 | Jan 11 02:20:19 2018 |
| README.txt | 1945 | Mar 15 05:15:58 2017 |
| adc.c | 3700 | Jan 11 02:20:19 2018 |
| boards.mk | 1662 | Jan 11 02:20:19 2018 |
| cpu.c | 1285 | Jan 11 02:20:19 2018 |
| cpu.h | 1810 | Jan 11 02:20:19 2018 |
| gpio.c | 10163 | Jan 11 02:20:19 2018 |
| gpio.h | 2982 | Jan 11 02:20:19 2018 |
| i2c.c | 4362 | Jan 11 02:20:19 2018 |
| lpc11xx.mk | 1751 | Jan 11 02:20:19 2018 |
| pwm.c | 8743 | Jan 11 02:20:19 2018 |
| serial.c | 5414 | Mar 26 06:23:45 2019 |
| spi.c | 2521 | Jan 11 02:20:19 2018 |
| timer.c | 6973 | Jun 26 11:40:49 2019 |
| timer.h | 2706 | Jan 11 02:20:19 2018 |
The C run time startup code lpc11xxxx.S and linker scripts lpc11xxxx.ld were written by myself based on various examples on the Internet and in The Definitive Guide to the ARM Cortex-M3.
The CMSIS library came from NXP, with some minor customization by myself.
Other files are original works by myself.
| Code Flash: | 0x00000000 to 0x00007FFF | 32 KB |
| Data RAM: | 0x10000000 to 0x10000FFF | 4 KB |
This framework may be used for other devices in the NXP LPC11xx family, provided the following files are modified:
| lpc11xxxx.ld | The RAM and ROM sizes must match the device. |
| lpc11xxxx.S | The interrupt vector table must match the device. |
| lpc11xxxx.debugjlink | The memory regions reported to GDB must match the device. |
This framework is validated on the following LPC11x development boards:
Tested on 9 August 2013 with gcc 4.8.1.
I am available for custom system development (hardware and software) of products using the LPC11xx or other microcontrollers.